New 3D Tri-Gate chips coming from Intel

Intel’s Tri-Gate Transistor Chipset Technology

Silicon wafers used in computer chipsets (processors) have typically been two dimensional (i.e. planar transistors).  On May 4, 2011, Intel announced a 3-D transistor technology, called Tri-Gate, that ensures Moore’s Law (see below), which predicts that chipset transistor density doubles every two years, keeps pace.  Dense chipsets allow Intel to pack more computer cycles (with less power usage) onto a single chip.  By building above the chip’s surface, Intel can build chipsets that are smaller, faster, and use less power.  The Tri-Gate transistors will be used in a line of 22 nanometer processors (code named Ivy Bridge) and ready for production use by 2012.

Transistors are akin to electronic switches forming the basic architecture of the modern day computer processor.  Intel’s 3-D transistor technology (called fin field-effect transistors) uses a fin  which allow Intel to pack more power in a reduced area of space.  Intel likened the transistors to a skyscraper which allows them to optimize space by building upward.  They will operate on lower voltages using half the power of the normal two dimensions 22nm chips.

The New York Post, who were offered an early glimpse of the technology, explained:

Silicon-on-insulator could be a win in terms of power efficiency.  From what I am hearing from the S.O.I. camp, there is a consensus and concession that FINFETs are faster. That’s the way you want to go for leading edge performance. In a factory tour here last week, Intel used a scanning electronic microscope to display a computer chip made using the new 22-nanometer manufacturing process . Viewed at a magnification of more than 100,000 times, the silicon fins are clearly visible as a series of walls projected above a flat surface. It is possible to make transistors out of one or a number of the tiny fins to build switches that have different characteristics ranging from faster switching speeds to extremely low power. Stepping back and looking at the chip under lower power magnification, it is possible to see the wiring design that appears much like a street map displaying millions of intersections.

As of this writing, the smallest Intel process was 32 nm.  Intel has stated publicly that they feel they can get chips to 10 nm by 2015.

Moore’s Law

The pace of doubling the number of transistors that can be etched onto a sliver of silicon every two years is known as Moore’s Law. Although not a law of physics, the 1965 observation by Intel co-founder Gordon Moore has defined the speed of innovation for much of the world’s economy. It has also set the computing industry apart from other types of manufacturing because it has continued to improve at an accelerating rate, offering greater computing power and lower cost at regular intervals.

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